AR# 37430: Timing/TRCE - What are the different types of jitter reported as uncertainty?
Timing/TRCE - What are the different types of jitter reported as uncertainty?
What are the different types of jitter reported as uncertainty in the Timing reports (TWR) and what do they represent?
Total System Jitter (TSJ) TSJ* is specified in the UCF using the SYSTEM_JITTER constraint. It is used to account for complete system noise. The SYSTEM_JITTER (System Jitter) constraint:
Specifies the system jitter of the design.
Depends on design conditions such as:
the number of flip-flops changing at one time
the number of I/Os changing
Applies globally to all clocks in the design.
Is combined with the INPUT_JITTER keyword on the PERIOD constraint, as wellas any jitter or phase error in the clock network, to generate the Clock Uncertaintyvalue that is shown in the timing report.
* Some devices has a default TSJ value, which is over-written by the SYSTEM_JITTER constraint.. Total Input Jitter (TIJ) TIJ is specified in the UCF on PERIOD constraints using the INPUT_JITTER keyword. It is used to account for a specific clocks noise.
INPUT_JITTER is the random, peak-to-peak jitter on an input clock. The defaultunits are picoseconds.
Discrete Jitter (DJ) DJ is determined based off of component types and component configurations (device and design specific, tool calculated). Phase Error (PE) PE is a value representing the phase variation between two clock signals. Because this value is discrete, and represents the actual phase difference between the Clock Modifying Blocks (CMB) outputs, it is added directly to the clock uncertainty value.