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AR# 37454

Logicore OBSAI v4.2 - Why does TXRESETDONE never get asserted and why does core fail to synchronize or assert stat_tx_frame_sync in Virtex-6 FPGA Core?


An issue has been seen in Virtex-6 FPGA that causes the core not to reset correctly at all but the highest line rate (3.072G if 6G is not enabled or 6.144G if 6G is enabled).


The problem is that the TXRESETDONE signal from the GTX fails to assert. This is due to the issue described in (Xilinx Answer 35681). At all but the highest line rate the user must implement the double GTXTEST pulse as described in (Xilinx Answer 35681).

This issue is to be fixed in the next release of the Core (v5.1), which is currently scheduled for the ISE 13.1 software release.

For Release Notes and Known Issues for 12.2 for the Logicore OBSAI 4.2, please see (Xilinx Answer 36971).

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
36971 LogiCORE IP OBSAI - Release Notes and Known Issues N/A N/A
AR# 37454
Date 05/20/2012
Status Archive
Type Known Issues
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