AR# 37806


Spartan, Virtex, 7 Series DCM/PLL/MMCM - Can the input frequency be changed without changing the CLKIN_PERIOD attribute?


It can be common in designs for the input clock to the DCM/PLL/MMCM to be changed during run time.

Can a mismatch with the CLKIN_PERIOD attribute cause problems?


The CLKIN_PERIOD attribute is used by software in the following ways:

  • To ensure that the DCM settings are correct (i.e., the DCM is correctly set in high or low frequency mode). This is not required for DCMs in the Spartan-3A or Spartan-6 device families, and there is no frequency mode setting for PLLs or MMCMs. If these settings are not correct, a DRC erroris seen during implementation.
  • It isused by Simulation to calculate the input and output CLKs from the DCM/PLL/MMCM.

If it is required to change the CLKIN frequency to a DCM/PLL/MMCM during run time, this can be done as long as the new CLKIN still meets the requirements of the DCM/PLL/MMCM.The PFD, VCO, I/O specifications need to be met in a PLL and MMCM, while the Frequency mode, I/O specifications need to be met for a DCM.In addition, it is also important to ensure that the design meets timing with all the different frequencies applied to the DCM/PLL/MMCM. This can be done by changing the Period Constraint in the ".pcf" file and re-running Timing Analyzer; this ensures that the same implementation file is used to analyze for all CLKIN frequencies.

Important Note:If the clock input frequency is changed, the DCM/PLL/MMCM must always be reset and allowed to lock onto the new input clock. The output clocks should not be used until the LOCK output goes High.

Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
46790 Spartan-6 FPGA Design Assistant - Troubleshooting Common Clocking Problems N/A N/A
AR# 37806
Date 12/15/2012
Status Active
Type General Article
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