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AR# 37862

MIG v3.6-3.61 - Increasing memory width to greater than the memory component creates extra CK, CKE, ODT pins


When I select the width of my controller to be larger than my memory component (i.e.,64 bits for two 32-bit memory DIMMs), the core creates extra CK, CKE, ODT pins. Why is this?


This is expected as the core does not know how the connections for the user's design areset up. If the user has a design that has the traces for both components to be equal, then they can share the lines without any issues. The extra signals are included in case they are not equally matched and it gives theuser more leeway for change.
AR# 37862
Date 12/15/2012
Status Active
Type General Article
  • Virtex-5 FXT
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