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AR# 37894

12.1 EDK - FSL debugging fails in SDK

Description


It looks like the issue hitting the CIP Wizard is that if such an FSL (output only) pcore is created, it is not seen as a peripheral to the processor by the hardware data structures. The software data structures follow suit. Hence, no driver gets assigned to this pcore. Not having a driver means that no parameters are generated by the driver Tcl.
If an FSL peripheral is connected, it might be connected through the peripheral's master port to MicroBlaze's slave FSL port. But, this does not mean that the peripheral does not need to be driven; it does. There is still a valid need for software on MicroBlaze to 'read' from the peripheral and it might need a special driver the user wants to use for this purpose.
The concept of slaves and masters is a bit simplistic in the hardware data structures. The hardware data structures do not seem to think that such a connected FSL peripheral is indeed a slave to the processor.
Following is an example design that illustrates the issue:

BEGIN microblaze
PARAMETER INSTANCE = microblaze_0
BUS_INTERFACE SFSL0 = fsl_v20_0
END

BEGIN fsl_adder
PARAMETER INSTANCE = fsl_adder_0
PARAMETER HW_VER = 1.00.a
BUS_INTERFACE MFSL = fsl_v20_0
END

BEGIN fsl_v20
PARAMETER INSTANCE = fsl_v20_0
PARAMETER HW_VER = 2.11.b
PORT FSL_Clk = clk_100_0000MHzPLL0
END


I generated the XML file and it does not think that fsl_adder_0 is a peripheral of microblaze_0 which seems to be the real problem.

Solution


At this point, SDKdoes notincorporate specific hardware connectivity rules.
If you require a work-around,youcan modelunincluded pcoresas libraries.
AR# 37894
Date Created 01/04/2011
Last Updated 12/15/2012
Status Active
Type General Article
Tools
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