Answer Number | Answer Title | Version Found | Version Resolved |
---|---|---|---|
34565 | Design Advisory Master Answer Record for Virtex-6 FPGA | N/A | N/A |
Answer Number | Answer Title | Version Found | Version Resolved |
---|---|---|---|
38016 | Virtex-6 Program pin (PROG_B) does not delay configuration when held low at power up | N/A | N/A |
Answer Number | Answer Title | Version Found | Version Resolved |
---|---|---|---|
43174 | 7 series - PROGRAM_B pin held Low prior to power-up does not delay configuration | N/A | N/A |
34565 | Design Advisory Master Answer Record for Virtex-6 FPGA | N/A | N/A |