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  1. Xilinx - All Programmable
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  3. AR# 38223: Virtex-6 Integrated Block for PCI Express - Disabling Legacy Interrupts in the GUI does not change Interrupt Pin register

AR# 38223

Virtex-6 Integrated Block for PCI Express - Disabling Legacy Interrupts in the GUI does not change Interrupt Pin register

Description

Version Found: v2.2, v1.1
Version Resolved and other Known Issues: See (Xilinx Answer 45723).

Disabling Legacy Interrupts in the CORE Generation GUI does not set the Interrupt Pin register in the core's configuration space to 0000.

Solution

To work around this issue, open the <core_name>.v[hd] file in the "source" directory and change the INTERRUPT_PIN attribute to 0. The <core_name> is whatever name was used during the customization process.

Release History
01/18/2012 - Updated; added reference to 45723
10/26/2010 - Initial Release

Note: "Version Found" refers to the version the problem was first discovered. The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
45723 Virtex-6 FPGA Integrated Block for PCI Express - Release Notes and Known Issues for all AXI Interface Versions N/A N/A
AR# 38223
Date 05/20/2012
Status Active
Type Known Issues
IP
  • Virtex-6 FPGA Integrated Block for PCI Express ( PCIe )