UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!
  1. Xilinx - Adaptable. Intelligent.
  2. Support
  3. AR# 38357: 12.2 EDK, MPMC v6.01.a - Incorrect DDR2 ODT setting for Spartan-6 FPGA

AR# 38357

12.2 EDK, MPMC v6.01.a - Incorrect DDR2 ODT setting for Spartan-6 FPGA

Description


For the DDR2 SDRAM "ODT Setting" in the configuration window of mpmc or "C_MEM_ODT_TYPE" in MHS, I can select from "Disabled", 75Ohm, 150Ohm, 50Ohm.
In testing, the ODT setting is implemented incorrectly; the 75Ohm and 150Ohm settings are switched.
How do I resolve this issue?

Solution


This issue is caused by an incorrect mapping in verilog module "s6_phy_top.v":
localparam P_MEM_DDR2_RTT = (C_MEM_ODT_TYPE == 0) ? "OFF" :
(C_MEM_ODT_TYPE == 1) ? "150OHMS" :
(C_MEM_ODT_TYPE == 2) ? "75OHMS" :
"50OHMS";
Which should be set as:
localparam P_MEM_DDR2_RTT = (C_MEM_ODT_TYPE == 0) ? "OFF" :
(C_MEM_ODT_TYPE == 1) ? "75OHMS" :
(C_MEM_ODT_TYPE == 2) ? "150OHMS" :
"50OHMS";
To work around this issue, set 75Ohm for 150Ohm and 150Ohm for 75Ohm as the desired setting.
This issue is scheduled to be fixed in EDK 13.1 and later.
AR# 38357
Date 12/15/2012
Status Active
Type General Article
Devices
  • Spartan-6 LX
  • Spartan-6 LXT
Tools
  • EDK - 12.2
  • EDK - 12.3
  • EDK - 12.1
IP
  • Multi-Port Memory Controller (MPMC)
Page Bookmarked