AR# 38399

SPI-4.2 v10.2 - Virtex-6 FPGAs Global Clocking support for source core removed when using static alignment

Description

For Virtex-6 FPGAs, support for global clocking has been removed for the Source core when the receiver Sink core is configured for static alignment.

Solution

The SPI-4.2 GUI has been updated to not allow this configuration starting in v10.2rev1 of the core.  Instead of using global clocking, regional clocking is recommended for the Source core when the receiver Sink core is configured for static alignment.

 The SPI-4.2 v10.2 rev1 patch is available for download in (Xilinx Answer 38211).
AR# 38399
Date 05/23/2014
Status Archive
Type General Article
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