AR# 38529

LogiCORE IP Image Characterization v1.1 - Why does the pCore faile to synthesize in EDK, with an error on the user_logic.vhd file?

Description

Why does the pCore fail to synthesize in EDK,with an error on the user_logic.vhd file?

ERROR:HDLParsers:3524 - ".../hdl/xlpp/ic_v1_01_a/hdl/vhdl/user_logic.vhd" Line 749. Unexpected end of line.

Solution

This is a known problem that only affects the pCore interface and is addressed in the next release of the Image Characterization IP.

This problem has been fixed in the Image Characterization 1.1 rev1 patch. See (Xilinx Answer 38243) to obtain the patch.

Please see (Xilinx Answer 34574) for a detailed list of LogiCORE IP Image Characterization Release Notes and Known Issues.

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AR# 38529
Date 12/15/2012
Status Archive
Type General Article
IP