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ISE 12.2 Pack Virtex-6 - Pack:2784 - Directed packing was unable to obey the user design constraint
The following error is being received during Map:
ERROR:Pack:2784 - Directed packing was unable to obey the user design constraint
st/pe_gen.natural_order_input.PE/delay_addr_bf2/SRL16_2) which requires
combining the symbols listed below into a single SLICEM component.
The directed pack was not possible because:
The top reasons for failure were:
-> A legal placement was never found for shift register symbol
How can I resolve this error?
This is a known issue which has been resolved in ISE 12.3.
The issue can be worked around by disabling power optimization (Removing the -power switch) of Map.
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