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AR# 38873

SPI-3 Link Layer v7.2 - TSX missing for first address out of TDAT on Virtex-6 and Spartan-6 Devices


When targeting Spartan-6 and Virtex-6 devices using  the SPI-3 Link Layer Core v7.2 and earlier, TSX is missing for first address out of TDAT.  This error appears in Spartan-6 and Virtex-6 FPGA functional simulation where the first address sent out on TDAT should be accompanied by TSX. This TSX pulse is missing. This shows up in simulation as a single RDAT/TDAT mismatch when the first Tx packet is received on SPI-3. No other mismatches occur. 


This issue has been fixed in v7.2 rev1 of the core available as a patch for download, see (Xilinx Answer 35141).
AR# 38873
Date 05/23/2014
Status Archive
Type General Article
  • SPI-4 Phase 2 Interface Solutions
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