AR# 38926

MIG Virtex-6 DDR2/DDR3/QDRII+ - The VREF, VRP, and VRN pins on the bank are used as general purpose I/O

Description

In the MIG design, I saw that the VREF, VRP, and VRN pins are used as general purpose I/O even if I select DCI on other pins and the I/O Standard needs Vref. What are some reasons for this?

Solution

Following are some possible reasons:

Check if DCI cascading is enabled; if yes, then only master bank should reserve the VRP/VRN pins, and the VRP/VRN pins on slave bank can be used as general purpose I/O.
Check if Internal Vref is enabled; if yes, then Vref pins can be used as general purpose I/O.
Check if the pins on that bank is used as output only; if yes, then DCI and Vref are not required. Details are described in the Virtex-6 FPGA SelectIO User Guide (UG361):http://www.xilinx.com/support/documentation/user_guides/ug361.pdf

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Associated Answer Records

Answer Number	Answer Title	Version Found	Version Resolved
39423	MIG v3.6-v3.91 Virtex-6 DDR2/DDR3/QDRII+ - The VRN/VRP pins were occupied by controller I/Os which require another bank for DCI Cascade	N/A	N/A

AR# 38926
Date	12/15/2012
Status	Active
Type	General Article
Devices	Virtex-6 CXT Virtex-6 HXT Virtex-6 LX More Virtex-6 LXT Virtex-6 SXT Less
Tools	ISE Design Suite - 12.3
IP	MIG

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