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AR# 39017

12.3 EDK - I cannot program my serial flash device

Solution


This problem is due to errors in the Microprocessor Peripheral Definition (MPD) file associated with the xps_spi_v2_02_a core.

To work around the issue, perform the following:
  1. Browse to the C:\Xilinx\12.3\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores directory
  2. Copy the xps_spi_v2_02_a directory into your global repository
  3. Open the xps_spi_v2_02_a\data\xps_spi_v2_1_0.mpd file, and change the following lines:

    PORT MISO_I = "", DIR = I, IO_IF = spi_0, IO_IS = data_in_I
    PORT MISO_O = "", DIR = O, IO_IF = spi_0, IO_IS = data_in_O
    PORT MISO_T = "", DIR = O, IO_IF = spi_0, IO_IS = data_in_T
    PORT MOSI_I = "", DIR = I, IO_IF = spi_0, IO_IS = data_out_I
    PORT MOSI_O = "", DIR = O, IO_IF = spi_0, IO_IS = data_out_O
    PORT MOSI_T = "", DIR = O, IO_IF = spi_0, IO_IS = data_out_T

    PORT SS_I = "", DIR = I, VEC = [0:(C_NUM_SS_BITS-1)], IO_IF = spi_0, IO_IS = slave_select_I
    PORT SS_O = "", DIR = O, VEC = [0:(C_NUM_SS_BITS-1)], IO_IF = spi_0, IO_IS = slave_select_O
    PORT SS_T = "", DIR = O, IO_IF = spi_0, IO_IS = slave_select_T

    PORT MISO = "", DIR = IO, THREE_STATE = TRUE, TRI_I = MISO_I, TRI_O = MISO_O, TRI_T = MISO_T, IO_IF = spi_0, IO_IS = data_in, PERMIT = BASE_USER, DESC = 'Master In Slave Out'
    PORT MOSI = "", DIR = IO, THREE_STATE = TRUE, TRI_I = MOSI_I, TRI_O = MOSI_O, TRI_T = MOSI_T, IO_IF = spi_0, IO_IS = data_out, PERMIT = BASE_USER, DESC = 'Master Out Slave In'
    PORT SS = "", DIR = IO, VEC = [0:(C_NUM_SS_BITS-1)], THREE_STATE = TRUE, TRI_I = SS_I, TRI_O = SS_O, TRI_T = SS_T, IO_IF = spi_0, IO_IS = slave_select, PERMIT = BASE_USER, DESC = 'Slave Select Vector'

    to:

    PORT MISO_I = "", DIR = I, IO_IF = spi_0, IO_IS = data_out_I
    PORT MISO_O = "", DIR = O, IO_IF = spi_0, IO_IS = data_out_O
    PORT MISO_T = "", DIR = O, IO_IF = spi_0, IO_IS = data_out_T
    PORT MOSI_I = "", DIR = I, IO_IF = spi_0, IO_IS = data_in_I
    PORT MOSI_O = "", DIR = O, IO_IF = spi_0, IO_IS = data_in_O
    PORT MOSI_T = "", DIR = O, IO_IF = spi_0, IO_IS = data_in_T

    PORT SS_I = "", DIR = I, VEC = [0:(C_NUM_SS_BITS-1)], IO_IF = spi_0, IO_IS = chip_select_I
    PORT SS_O = "", DIR = O, VEC = [0:(C_NUM_SS_BITS-1)], IO_IF = spi_0, IO_IS = chip_select_O
    PORT SS_T = "", DIR = O, IO_IF = spi_0, IO_IS = chip_select_T

    PORT MISO = "", DIR = IO, THREE_STATE = TRUE, TRI_I = MISO_I, TRI_O = MISO_O, TRI_T = MISO_T, IO_IF = spi_0, IO_IS = data_out, PERMIT = BASE_USER, DESC = 'Master In Slave Out'
    PORT MOSI = "", DIR = IO, THREE_STATE = TRUE, TRI_I = MOSI_I, TRI_O = MOSI_O, TRI_T = MOSI_T, IO_IF = spi_0, IO_IS = data_in, PERMIT = BASE_USER, DESC = 'Master Out Slave In'
    PORT SS = "", DIR = IO, VEC = [0:(C_NUM_SS_BITS-1)], THREE_STATE = TRUE, TRI_I = SS_I, TRI_O = SS_O, TRI_T = SS_T, IO_IF = spi_0, IO_IS = chip_select, PERMIT = BASE_USER, DESC = 'Slave Select Vector'
  4. Run through Base System Builder (BSB) again if you are targeting a board recognized by BSB.

A fixed version of the core can be downloaded from:

http://www.xilinx.com/txpatches/pub/swhelp/ise12_updates/xps_spi_v2_02_a.zip

You can install the core in a global repository (recommended) or you can replace the current core in the installation area. If you choose to place the patched core in the installation area, you must delete the C:\Xilinx\12.3\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\__MpdDataBase.txt file after inserting the patched core.

This problem is scheduled to be fixed in 13.1.
AR# 39017
Date Created 11/10/2010
Last Updated 01/04/2011
Status Active
Type General Article
Tools
  • EDK - 12.3
  • EDK - 12.4
IP
  • XPS Serial Peripheral Interface