This difference occurs only at startup (time 0) and is due to logic within the block that ensures no contention is on the outputs during configuration. After initial startup, any further assertions of sys_reset_n cause trn_reset_n/user_reset_out(AXI) to assert simultaneously. This behavior is expected.
Revision History
01/18/2012 - Updated; added reference to 45072
07/06/2011 - Updated for v2.3
12/11/2010 - Initial release
Note: "Version Found" refers to the version the problem was first discovered. The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
Answer Number | Answer Title | Version Found | Version Resolved |
---|---|---|---|
37939 | Spartan-6 FPGA Integrated Block Wrapper for PCI Express (AXI) - Resolved issues in v2.1 | N/A | N/A |
Answer Number | Answer Title | Version Found | Version Resolved |
---|---|---|---|
45702 | Spartan-6 FPGA Integrated Block for PCI Express - Release Notes and Known Issues for all AXI Interface versions | N/A | N/A |
39371 | Spartan-6 FPGA Integrated Block Wrapper for PCI Express (AXI) - Resolved issues in v2.2 | N/A | N/A |
37938 | Spartan-6 FPGA Integrated Block Wrapper v1.4 for PCI Express - Release Notes and Known Issues | N/A | N/A |
37939 | Spartan-6 FPGA Integrated Block Wrapper for PCI Express (AXI) - Resolved issues in v2.1 | N/A | N/A |
AR# 39063 | |
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Date | 12/15/2012 |
Status | Active |
Type | General Article |
Devices | |
IP |