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  3. AR# 39190: Virtex-5 FPGA Embedded Tri-mode Ethernet MAC Wrapper v1.7 - GTP/GTX Physical DRC failure in MAP

AR# 39190

Virtex-5 FPGA Embedded Tri-mode Ethernet MAC Wrapper v1.7 - GTP/GTX Physical DRC failure in MAP

Description


In ISE design tools 12.3 and later, implementation of the Virtex-5 Embedded Tri-Mode Ethernet MAC Wrapper's example design might fail during MAP with an error similar to the following.

NOTE: This issue only affects configurations with the 1000BASE-X PCS/PMA or SGMII physical interfaces.

"ERROR:PhysDesignRules ? Block <name> (GTP_DUAL_X0Y0) needs GTP_DUAL_X0Y1 instantiated: When using a GTP/GTX with a REFCLK source coming from the IBUFDS element near another GTP/GTX, each GTP in between the source and destination must be instantiated, have connected power supplies and have its REFCLKPWRDNB pin asserted High - even though it isn't used in the design except to pass on the REFCLK."

For more information see:
(Xilinx Answer 39047) Virtex-5 GTX RocketIO - Instantiating an unused GTX to forward reference clocks
(Xilinx Answer 33473) Virtex-5 GTP RocketIO - Instantiating an unused GTP to forward reference clocks

Solution

For cases where this core has been integrated into your design, follow the instructions as described in the error message and linked Answer Records above. However, when implementing the example design as provided by the CORE Generator tool, the following modifications to the example UCF file are sufficient to avoid the error:

For xc5vlx and xq5vlx parts:

Change INST "MGTCLK_N" LOC = "Y3" to LOC = INST "MGTCLK_N" LOC = "AF3"
Change INST "MGTCLK_P" LOC = "Y4" to LOC = INST "MGTCLK_N" LOC = "AF4"

For xc5vsx parts:

Change INST "MGTCLK_N" LOC = "P3" to LOC = INST "MGTCLK_N" LOC = "Y3"
Change INST "MGTCLK_P" LOC = "P4" to LOC = INST "MGTCLK_N" LOC = "Y4"

For xq5vsx parts:

Change INST "MGTCLK_N" LOC = "P3" to LOC = INST "MGTCLK_N" LOC = "AF3"
Change INST "MGTCLK_P" LOC = "P4" to LOC = INST "MGTCLK_N" LOC = "AF4"

This issue is resolved in the Virtex-5 FPGA Embedded Tri-mode Ethernet MAC Wrapper v1.8 available in ISE 13.1.

AR# 39190
Date 02/15/2011
Status Active
Type General Article
Devices
  • Virtex-5 FXT
  • Virtex-5 LXT
  • Virtex-5 SXT
  • Virtex-5 TXT
IP
  • Virtex-5 Embedded Tri-mode Ethernet MAC Wrapper

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