We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 39434

Virtex-6 GTX Transceivers - POWER_SAVE errors during implementation/simulation


This Answer Record discusses how to work around the simulation errors the following implementation errors that can occur when the POWER_SAVE attribute is set correctly:




There are two steps that need to be completed to work around all of the above implementation errors:

1) Create an environment variable XIL_MAP_SKIP_LOGICAL_DRC and set it to 1. In Windows, this can be accomplished with the following command:


And in Linux, the following command can be used:


For more details onchecking and setting environment variables, please refer to Answer Record 11630.

Setting this environment variable will bypass all of the logical DRCs present in the MAP phase of implementation. To ensure that these checks occur, ensure that the design is run through PAR which will perform similar checks. If desired, MAP can be run with this variable disabled to minimize run times and catch DRC errors earlier in the implementation flow. It will need to be set again to bypass these errors and run PAR.

2) Unzip the appropriate patch into an empty directory of your choosing:


Linux 32:http://www.xilinx.com/txpatches/pub/swhelp/ise12_updates/39430-2_map_122_lin32.tar.gz
Linux 64:http://www.xilinx.com/txpatches/pub/swhelp/ise12_updates/39430-2_map_122_lin64.tar.gz
Windows 32:http://www.xilinx.com/txpatches/pub/swhelp/ise12_updates/39430-2_map_122_nt32.zip
Windows 64:http://www.xilinx.com/txpatches/pub/swhelp/ise12_updates/39430-2_map_122_nt64.zip


Linux 32:http://www.xilinx.com/txpatches/pub/swhelp/ise12_updates/39430-2_map_123_lin32.tar.gz
Linux 64:http://www.xilinx.com/txpatches/pub/swhelp/ise12_updates/39430-2_map_123_lin64.tar.gz
Windows 32:http://www.xilinx.com/txpatches/pub/swhelp/ise12_updates/39430-2_map_123_nt32.zip
Windows 64:http://www.xilinx.com/txpatches/pub/swhelp/ise12_updates/39430-2_map_123_nt64.zip


Linux 32:http://www.xilinx.com/txpatches/pub/swhelp/ise12_updates/39430-2_map_124_lin32.tar.gz
Linux 64:http://www.xilinx.com/txpatches/pub/swhelp/ise12_updates/39430-2_map_124_lin64.tar.gz
Windows 32:http://www.xilinx.com/txpatches/pub/swhelp/ise12_updates/39430-2_map_124_nt32.zip
Windows 64:http://www.xilinx.com/txpatches/pub/swhelp/ise12_updates/39430-2_map_124_nt64.zip

Create and set a MYXILINX environment variable and set it to the directory containing the unzipped contents from above. For more information on the MYXILINX environment variable, please see (Xilinx Answer 2493) /> Note: These patches have been updated as of Jan 17, 2011. These updated patches have corrected DRCs though earlier patches will allow for implementation of the updated POWER_SAVE attribute recommendations for the Virtex-6 GTX Transceiver.


  1. Download the following zip file:http://www.xilinx.com/txpatches/pub/swhelp/ise12_updates/gtx_da_sim_patch.zip
  2. Use any unzip utility to unarchive this file
  3. Once the files have been extracted, one of two flows must be used:

For ModelSim:

vlog -work unisims_ver GTXE1.v
vlog -work simprims_ver X_GTXE1.v
vcom -work unisim GTXE1.vd vcom -work simprim X_GTXE1.vhd

For a permanent ModelSim solution and for all other simulators:

Replace the files in the following directories and run compxlib:

<Xilinx install>/ISE_DS/ISE/verilog/src/unisims/GTXE1.v
<Xilinx install>/ISE_DS/ISE/verilog/src/simprims/X_GTXE1.v
<Xilinx install>/ISE_DS/ISE/vhdl/src/unisims/secureip/GTXE1.vhd
<Xilinx install>/ISE_DS/ISE/vhdl/src/simprims/secureip/mti/X_GTXE1.vhd

Linked Answer Records

Associated Answer Records

AR# 39434
Date 12/15/2012
Status Active
Type General Article
  • Virtex-6 SXT
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LXT
  • Virtex-6 FPGA GTX Transceiver Wizard
  • Virtex-6 FPGA Integrated Block for PCI Express ( PCIe )
  • XAUI
  • More
Page Bookmarked