AR# 39516


12.4 ChipScope Pro IBERT Spartan-6 GTP - When generating my core I see "ERROR:PhysDesignRules:1859 "


When generating my core I see:

ERROR:PhysDesignRules:1859 - The computed value for the VCO operating frequency of PLL_ADV instance

U0/U_IBERT_CORE/U_GTCP_X0_Y1/U_USR_CLK/I_PH_DATA_WIDTH_GT10.U_TXUSRCLK0 _PLL/pll_base_inst/PLL_ADV is calculated to be 1067.500008 MHz.

This falls above the operating range of the PLL VCO frequency for this device of 400.000000 - 1050.000000 MHz. Please adjust either the input frequency CLKIN_PERIOD, multiplication factor CLKFBOUT_MULT or the division factor DIVCLK_DIVIDE, in order to achieve a VCO frequency within the rated operating range for this device.

How do I work around this issue?


This issue will be resolved in ChipScope Pro software 13.1. If you need further assistance with this problem, please open an online WebCase with Xilinx Customer Support at:

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
35269 12.x ChipScope Pro - Known Issues for the ChipScope Pro 12.x software N/A N/A
AR# 39516
Date 01/02/2013
Status Active
Type General Article
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