General Description: CORE Generator may create VHX, XNF (or EDN) and XSF output files, even when not directed to do so.
Solution
Selecting the "XNF Implementation Netlist" (v1.4 only), "Edif Implementation Netlist (v1.5), "VHDL Instantiation Template", "Verilog Instantiation Template" or "Viewlogic Schematic Symbol" output format option all result in outputs that include .VHX files.
Also, selecting the "VHDL Instantiation Template", "Verilog Instantiation Template" or "Viewlogic Schematic Symbol" setting all result in both a .XNF (v1.4 only) or .EDN (v1.5 only) and a .XSF file being produced, even though these were not requested by the user.
These files should only be produced when the XNF (v1.4 only) or Edif Implementation Netlist option is selected.