What is the Ethernet Interface FIFO depth and width?
Transmitter FIFO is 8192 by 6-bits for MII cores (4-bits data, 1-bit error, 1-bit end-of-frame) and 4096 by 12-bits for GMII cores (8-bits data, 2-bits each for error and end-of-frame).
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 54473 | LogiCORE IP CPRI Core - Release Notes and Known Issues for Vivado 2013.1 and newer tool versions | N/A | N/A |
| AR# 40021 | |
|---|---|
| Date | 03/14/2017 |
| Status | Active |
| Type | General Article |
| IP | |