XST can extract Finite State Machines (FSM) from the RTL code and optimizes the FSM by re-encoding based on the number of states and inputs.
If an FSM is extracted, you'll see messages similar to following in the "HDL Synthesis" stage.
And you'll see messages similar to following stating which encoding algorithm is used in the "Low Level Synthesis" stage.
There are some XST options which are usedto controlFSM optimization.
For help for applying XST constraints, please refer to (Xilinx Answer 39749). For more information of these XST constraints about FSM, please refer to XST User Guide See (Xilinx Answer 38931)).
Answer Number | Answer Title | Version Found | Version Resolved |
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38927 | Xilinx Solution Center for XST | N/A | N/A |
Answer Number | Answer Title | Version Found | Version Resolved |
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40085 | Design Assistant for XST - Performance Considerations | N/A | N/A |
AR# 40093 | |
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Date | 02/24/2013 |
Status | Active |
Type | General Article |