AR# 40100


How to get the resource utilization when a design contains too many I/O pins?


I am trying to implement a submodule of my design to examine the resource utilization, but too many I/O pins are being inferred for the device I am using. How can I get the resource utilization when submodule has more ports thanthe number of I/O pins available?


It is possible to do this by preventing the I/O pin inference and then also preventing the trimming of the resulting dangling logic:

1. Add the design code into ISE.
2. In the Synthesis properties, disable -iobuf.
3. In the map properties, disable -u (trim unconnected signal)
AR# 40100
Date 12/15/2012
Status Active
Type General Article
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