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  3. AR# 40100: How to get the resource utilization when a design contains too many I/O pins?

AR# 40100

How to get the resource utilization when a design contains too many I/O pins?

Description

I am trying to implement a submodule of my design to examine the resource utilization, but too many I/O pins are being inferred for the device I am using. How can I get the resource utilization when submodule has more ports thanthe number of I/O pins available?

Solution

It is possible to do this by preventing the I/O pin inference and then also preventing the trimming of the resulting dangling logic:

1. Add the design code into ISE.
2. In the Synthesis properties, disable -iobuf.
3. In the map properties, disable -u (trim unconnected signal)
AR# 40100
Date 12/15/2012
Status Active
Type General Article
Tools
  • ISE - 10.1
  • ISE Design Suite - 11.1
  • ISE Design Suite - 11.2
  • More
  • ISE Design Suite - 11.3
  • ISE Design Suite - 11.4
  • ISE Design Suite - 11.5
  • ISE Design Suite - 12.1
  • ISE Design Suite - 12.2
  • ISE Design Suite - 12.3
  • ISE Design Suite - 12.4
  • ISE Design Suite - 13
  • ISE Design Suite - 13.1
  • ISE - 8.1i
  • ISE - 8.1i sp1
  • ISE - 8.1i sp2
  • ISE - 8.1i sp3
  • ISE - 8.2i
  • ISE - 8.2i sp1
  • ISE - 8.2i sp2
  • ISE - 8.2i sp3
  • ISE - 9.1i
  • ISE - 9.1i sp1
  • ISE - 9.1i sp2
  • ISE - 9.1i sp3
  • ISE - 9.2i
  • ISE - 9.2i sp1
  • ISE - 9.2i sp2
  • ISE - 9.2i sp3
  • ISE - 9.2i sp4
  • Less