This section of the MIG Design Assistant focuses on Supported Features for the Spartan-6 Memory Controller Block (MCB). Below you will find information related to your specific question.
Note: This Answer Record is a part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.
For a complete list of supported features and frequency support forthe Spartan-6 MCB, please see the "Memory Controller Block Overview" sections in the Spartan-6 FPGA Memory Controller User Guide (UG388). The following links provide some additional information regarding specific features:
Answer Number | Answer Title | Version Found | Version Resolved |
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43600 | MIG Spartan-6 FPGA DDR2/DDR3 - MIG Options | N/A | N/A |
40685 | MIG Spartan-6 MCB - JEDEC Specification | N/A | N/A |
40684 | MIG Spartan-6 MCB - Multi-Controllers | N/A | N/A |
40531 | MIG Spartan-6 MCB - Supported Devices | N/A | N/A |
34266 | Xilinx Virtex-6 MIG Solution Center - Design Assistant | N/A | N/A |
37498 | MIG Design Assistant - Spartan-6 Core Functionality | N/A | N/A |
AR# 40155 | |
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Date | 12/15/2012 |
Status | Active |
Type | General Article |
Devices | |
IP |