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MIG 7 Series v1.1 - Memory interface should not span both High Range (HR) and High Performance (HP) banks
In MIG 7 Series v1.1, the bank selection page does not prevent the combination of High Range (HR) and High Performance (HP) banks in a memory interface.
This means an interface could be generated where Data and Address/Control are located in both HR and HP banks.
This combination would result in different I/O standards on the same memory interface bus.
MIG should prevent this combination.
To work around this GUI issue, ensure that the bank selection for a memory interface is contained within either High Range or High Performance banks.
The MIG tool properly implements this bank selection rule starting in MIG 7 Series v1.2 (to be released with ISE Design Suite 13.2).
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