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AR# 40468

MIG v3.7 Virtex-6 AXI - Verify UCF and Update Design and UCF does not work properly with MIG v3.61 designs

Description

When

1) Attempting to run a MIG v3.61 Virtex-6 AXI Enabled design in ISE 13.1 software
or
2) After running the design through the "Verify UCF and Update Design and UCF" tool in the MIG v3.7 GUI,

The design will fail during synthesis.

Solution

In MIG v3.7 a new parameter C_S_AXI_SUPPORTS_NARROW_BURST was added to AXI Enabled designs.

Since this parameter is not present in MIG v3.61 based designs, "Verify UCF and Update Design and UCF" does not check for or add this parameter into the updated design.
 
This will then cause an XST failure to occur.

Since the new parameter is not included in previous Virtex-6 MIG AXI designs, you will need to create a new design using MIG v3.7 or you can manually add and set the C#_S_AXI_SUPPORTS_NARROW_BURST parameter into your mig.prj file and rerun through "Verify UCF and Update Design and UCF".

Here is an example of what will need to be added to the mig.prj under "< AXIParameters >":
 

"< C0_S_AXI_SUPPORTS_NARROW_BURST > 1 < /C0_S_AXI_SUPPORTS_NARROW_BURST >"


Please refer to the Virtex-6 FPGA Memory Interface Solutions User Guide (UG406) for a description of the C_S_AXI_SUPPORTS_NARROW_BURST parameter.

This issue is planned to be fixed in a future release.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
39128 MIG Virtex-6 and Spartan-6 v3.7 - Release Notes and Known Issues for ISE Design Suite 13.1 N/A N/A

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
39128 MIG Virtex-6 and Spartan-6 v3.7 - Release Notes and Known Issues for ISE Design Suite 13.1 N/A N/A
AR# 40468
Date Created 02/08/2011
Last Updated 08/18/2014
Status Active
Type Known Issues
Devices
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • More
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Less
IP
  • MIG