2. Support
  3. AR# 4050: NGDBuild, XNF2NGD, and EDIF2NGD - "Bad part type" errors
  4. AR# 40506: LogiCORE IP RXAUI v2.1 - Xs are seen in Marvel RXAUI 7-Series timing simulation

AR# 40506

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LogiCORE IP RXAUI v2.1 - Xs are seen in Marvel RXAUI 7-Series timing simulation

Description

When the Marvel RXAUI core is targeting Virtex-7 or Kintex-7 devices, Xs are seen in timing simulation.The problem is that the RXOUTCLK from the GTXE2_CHANNEL transitions from 0->X at the start of simulation.

Solution

To resolve this issue, you have to manually force the RXOUTCLK signal to 0 (through a simulator-specific command) for timing simulation to work. Otherwise the Xs will propagate through the simulation, resulting in the simulation failing to complete successfully.

Thisissue isscheduled to be fixed in the GTXE2_CHANNEL simulation model in the ISE 13.2 software.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
40630 LogiCORE IP RXAUI v2.1 - Release Notes and Known Issues for the 13.1 ISE Software N/A N/A
AR# 40506
Date 12/15/2012
Status Active
Type General Article
IP
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