Description

• General Information
• New Features
• Resolved Issues
• Known Issues

Solution

General Information

The following are Generated out of CORE Generator software:

• Ethernet AVB Endpoint core netlist
• Example design HDL top-level and associated HDL files
• Demonstration test bench to exercise the example design
• Documentation Directory containing Data Sheet, Getting Started Guide, and User Guide

• ISE 13.1 software support
• Updated the RX Splitter function to optionally also use the Ethernet VLAN
  VID value to identify AV stream data. The Rx Filtering Control Register can
  now be setup to filter out two unique combinations of VLAN PCP/VID values.
  Software drivers updated to support new address mapping.
• Removed support for pcore generation

• None

Known Issues

(Xilinx Answer 40955) LogiCORE IP Ethernet AVB Endpoint v3.1 - Timing simulation sometimes times out

(Xilinx Answer 40956) LogiCORE IP Ethernet AVB Endpoint v3.1 - Timing errors occasionally seen when targeting Spartan-3 devices

Linked Answer Records

Child Answer Records