AR# 40693: 13.x/12.x Chipscope - maximum data depth setting for Spartan-6 in ILA
13.x/12.x Chipscope - maximum data depth setting for Spartan-6 in ILA
I need to capture about 128K depth of data to debug my design targeting a Spartan-6 device. WhenI generate ChipScope ILA from CORE Generator tool, the maximum available sample data depth is "65536" (64K). However, the BRAM resource of my design is large enough for sampling more depth of data. I can see for Virtex-5 FPGA thatthis number is 128K. Is it possible to expand this number for Spartan-6 FPGA, as it is not a device limitation?
This limit is hard coded into the tools.A fix for thisfeature is currently scheduled to be added in 13.2.