UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 407

XNFPREP 5.0: ERROR 3609 with XBLOX designs with carrylogic and rloc_range

Solution




PROGRAM:

XNFPREP 5.0.0

PROBLEM:

XBLOX will implement counters and other components (add_sub) with
carry logic. If the RLOC_RANGE attribute is placed on the component,
XBLOX will then place the RLOC_RANGE attribute on all the primitives
it creates to implement that component. In the case of a add_sub, there
will be CY4_XX symbols that will have the RLOC_RANGE applied, but no
RLOC. This is then flagged in XNFPREP with the following error:

XNFPREP: ERROR 3609:
The symbol '$1i36/CY_MODE_0' (type = CY4_37, output signal =
$1i36/CY_MODE_SIG_2_0) has RLOC_RANGE parameter, however it does
not have any RLOC parameter.

This is obviously an error, but not one created by the user.

NOTE: In XBLOX 5.0, carry logic is used for components
if there width is 13 or greater. So a counter
that is 12 bits will NOT be implemented with carry
logic.

WORKAROUND:

Edit the .xg file. Delete the RLOC_RANGE attribute from the SYMs that do NOT
have RLOC attributes on them.




AR# 407
Date Created 08/31/2007
Last Updated 03/31/1997
Status Archive
Type ??????