What is the appropriate MIG flow for analyzing simultaneously switching outputs/noise?
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Hardware characterization of MCB-based memory interfaces indicates that there are no Simultaneous Switching Output (SSO) related restrictions when using the predefined IOB locations up to their maximum extent (that is, the maximum number of data and address pins in the interface). For more information, please seethe "Simultaneous Switching Output Considerations" sections in the Spartan-6 FPGA Memory Controller User Guide(UG388).
(Xilinx Answer 36141)12.2 Spartan-6 PlanAhead - Can I ignore the noise failures on MIG designs?