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FIFO Generator v8.1 The FIFO works fine however the rd_data_count and wr_data_count does not do match exactly what I expected
The FIFO works fine but the rd_data_count does not do exactly what I expect.
I expect it to count up by two every time a data word is written and to count down by one every time a data word is read.
Also when writing to an empty FIFO, the counter should count down by one some time after the first write, reflecting the FWFT behavior.
However it is instead counting down by two, as if the first read had been done with the write side data width.
It looks like this is what actually happens inside the FIFO, and the port resizing is added after the actual FIFO.
This is the expected behavior of FIFO Generator core.
For exact data count behavior you will need to enable the "Use Extra Logic" option to get more accurate information.
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