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  3. AR# 40908: LogiCORE IP Tri-Mode Ethernet MAC v4.5 - X's are seen in timing simulation when targeting Virtex-4 devices

AR# 40908

LogiCORE IP Tri-Mode Ethernet MAC v4.5 - X's are seen in timing simulation when targeting Virtex-4 devices

Description

When I run a Virtex-4 device timing simulation with the Tri-Mode Ethernet MAC IP, it is possible that the DCM output can glitch upon reset causing X's to propagate through the simulation which results in the timing simulation to fail.

Solution

This has been seen with the following configuration:

CSET address_filter=true
CSET clock_enables=false
CSET component_name=core
CSET half_duplex=true
CSET mac_speed=Tri_speed
CSET management_interface=true
CSET number_of_address_table_entries=3
CSET physical_interface=RGMII

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
40623 LogiCORE IP Tri-Mode Ethernet MAC v4.5 - Release Notes and Known Issues for ISE 13.1 software N/A N/A
AR# 40908
Date 05/23/2014
Status Archive
Type General Article
IP
  • Tri-Mode Ethernet MAC