UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!
  1. Xilinx - Adaptable. Intelligent.
  2. Support
  3. AR# 40911: Spartan-6 What is the POR (Power on Reset) Threshold Voltage?

AR# 40911

Spartan-6 What is the POR (Power on Reset) Threshold Voltage?

Description

The Spartan-6 FPGAData Sheet (DS162) does not specify a POR threshold voltage for the Spartan-6 devices, as previous Spartan families had. What are the equivalent specifications for power on reset threshold levels?

Solution

Spartan-6 FPGA does not have the same POR Threshold Voltage as the Spartan-3 families do.

For Spartan-6 FPGA, when powering on the device the minimum operating condition levels found in the data sheet for VCCINT, VCCAUX and VCCO can be used as the minimum POR threshold.

If programming @ 1.8v then the minimum VCCO2 spec must be met which is 1.65V.

Once the Spartan-6 device is powered the voltage must NOT drop below the VDRINT and VDRAUX minimum levels as specific in the Spartan-6 Data Sheet.

For queries on the Spartan-3 POR threshold levels please see(Xilinx Answer 19816).

Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
46791 Spartan-6 FPGA Design Assistant - Troubleshoot Common Fabric Problems N/A N/A
AR# 40911
Date 12/15/2012
Status Active
Type General Article
Devices
Page Bookmarked