For the LogiCORE CPRI core v3.2, what is the smallest Spartan-6 FPGA that supports the dual core IP configuration with different line rates?
The dual core configuration using different line rates of the CPRI core will not fit into an xc6slx25t device.
This is because the default dual core configuration needs two PLLs that are accessible from the GTPA1 via BUFIOs.
The xc6slx25t only has one.
The work-around is to do the following:
For LogiCORE CPRI - Release Notes and Known Issues, see (Xilinx Answer 36969)