For general clocking issues, please refer to the Clocking Debug Guide.
(Xilinx Answer 9586) | Virtex/Virtex-E DLL reset requirement |
(Xilinx Answer 11778) | Virtex/-E/-II/-II Pro, Spartan-II/-IIE/-3 - Device configures correctly after PROG is pulsed, but DLL/DCM/DCI does not function correctly when reconfigured |
(Xilinx Answer 14425) | Virtex-II/-II Pro/-4/-5 FPGA DCM - Resetting after configuration is strongly recommended for a DCM that is configured with external or internal feedback (VHDL/Verilog) |
Answer Number | Answer Title | Version Found | Version Resolved |
---|---|---|---|
41516 | Xilinx Obsolete Device Solution Center - Fabric for devices covered by XCN12026 | N/A | N/A |