We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 41531

Xilinx Obsolete Device Solution Center - Block RAM for devices covered by XCN12026


Note: This Answer Record is part of the Xilinx Obsolete Device Solution Center (Xilinx Answer 40174)which is available to address questions related to obsolete devices.


(Xilinx Answer 21870) Virtex-II/-II Pro/-4/-5/-6 FPGA Block RAM - Do the setup and hold times of the ADDRESS inputs need to be met, even if the output is unused and WE is de-asserted?
(Xilinx Answer 39832)Virtex-II - Does the Virtex-II block RAM contain additional output registers?
(Xilinx Answer 12010)Virtex II - What is the difference between Cycle-Cycle Jitter and Period Jitter (as discussed in the Virtex-II Data Sheet)?

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
41516 Xilinx Obsolete Device Solution Center - Fabric for devices covered by XCN12026 N/A N/A

Associated Answer Records

AR# 41531
Date 12/15/2012
Status Active
Type General Article
  • Spartan-IIE
  • Spartan-IIE XA
  • Virtex-E
  • More
  • Virtex-E QPro
  • Virtex-EM
  • Virtex-II
  • Less
Page Bookmarked