AR# 4166: V1.5 CORE Generator - What's new in the v1.5 release?
AR# 4166
V1.5 CORE Generator - What's new in the v1.5 release?
Description
Keywords: CORE Generator, COREGEN, Coregen, v1.5
Urgency: Standard
General Description: What's new in the v1.5.0 release?
Solution
- HP-UX 10.2 support - EDIF is generated for implementation instead of XNF; - Verilog behavioral models - characterization data (CLB utilization and speed) have been added to CORE Generator module datasheets - limited Virtex architecture support has been added (dual and single port block RAM modules)