General Description: How do I instantiate a LogiBLOX component into an Exemplar design?
1. Create a LogiBLOX component. In the SETUP window, choose "other" as the Vendor and "()" for Bus Notation. Select your Project Directory, Device Family, and Options as you normally would.
2. Instantiate the component into the Verilog/VHDL code. LogiBLOX will create a VEI (Verilog) or VHI (VHDL) file for your component. Cut and paste this file into your Verilog/VHDL code. It contains the component declaration as well as an instantiation template.
3. Run the Exemplar tools as you normally would. However, when the EDIF netlist is written out, go to the Advanced window and de-select the "Allow writing arrays (busses) in EDIF output". This will ensure that the bus notation matches the LogiBLOX component.
4. Continue with normal M1 flow. Be sure that NGO file resides in same directory as the EDIF netlist.