Does Xilinx specify the recommended trace impedance between the FPGA and the DDR3 SDRAM for the MIG 7 Series DDR3 design?
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Xilinx recommends 40 ohm traces for DDR3 SDRAM memory interfaces running at or above 1333 Mb/s.
40 ohm traces provide better SSI and signal integrity because they can transfer more energy to the receiver at the SDRAM.50 ohm traces can be used for slower data rates.
The 7 Series FPGAs Memory Interface Solutions User Guide (UG586) now documents these recommended trace impedances.
Please refer to the user guide for additional information.