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AR# 42063: Licensing - Which Xilinx design tools (software) are licensed?
Licensing - Which Xilinx design tools (software) are licensed?
Which Xilinx design tools (software) are licensed?
When is the license checked out?
The following software tools are licensed as indicated in the comments to the right of the application name.
Licenses are checked out only when an application that needs a license starts to run.
Most applications will check out and hold this license for as long as the application is open.
Implementation Tool Flow
MAP : ISE feature needed
PAR : ISE feature needed
BitGen : ISE feature needed; will not run on Trial or Hardware Beta, also requires IP Core feature for licensed LogiCORE IP cores
NGDBuild : Requires IP Core feature for licensed LogiCORE IP cores
ISE User Interface tools
Project Navigator : Validity check only, for ISE software feature; will not hold a design tool license
ChipScope Pro Analyzer : ChipScope Pro and ChipScope Pro SIOTK features required for Analyzer (non-enforced for 11.1); design phase in ISE Design Suite 11.2 and later
PlanAhead : PlanAhead feature needed (included in all ISE license configurations)
Partial Reconfiguration (PR) : PlanAhead tool will check for a PR license feature at startup and enable PR features if a PR license is available. The PR feature is also checked-out and immediately checked-in during NGDBUILD for each RP encountered. (It is not held for the duration of NGDBUILD).
ISIM : ISIM feature needed
CORE Generator : IP Core feature; for generation of licensed LogiCORE IP cores
XPS GUI : XPS/SDK license validity check only; will not hold a license
PlatGen : XPS feature needed
SDK GUI : SDK feature validity check only; will not hold a license (Applicable to ISE 13.4 and earlier)
LibGen : SDK feature needed (Applicable to ISE 13.4 and earlier)
XST (in EDK) : Generate Netlist requires IP Core feature for synthesis of licensed LogiCORE IP cores
System Generator : SysGen feature needed for Generate command
AccelDSP : AccelDSP feature needed for Generate step