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AR# 42103

Soft Error Mitigation Controller - Frequently Asked Questions

Description

This answer record includes a master list of Soft Error Mitigation Controller answer records.

Solution

How Tos

(Xilinx Answer 39793) - Soft Error Mitigation Controller - How can the user take control of the external SPI to update it?
(Xilinx Answer 53440) - Soft Error Mitigation (SEM) v3.4 - INFO: SPI Flash devices that have been tested with the SEM solution
(Xilinx Answer 54350) - 7 Series - FRAME_ECCE2 Port Descriptions and Functionality

Bitstream Questions
(Xilinx Answer 39285) - Soft Error Mitigation Controller - How is the MCS data used for correction programmed to SPI memory?
(Xilinx Answer 39286) - Soft Error Mitigation Controller - Is there a way to convert the MCS file to BIN format?
(Xilinx Answer 39288) - Soft Error Mitigation - Is the MCS file used for error correction by replace the same as the configuration bitstream
(Xilinx Answer 41197) - Soft Error Mitigation Controller - What is the difference in the EBC and the EBD file generated by the BitGen essential bits command?
(Xilinx Answer 41199) - Soft Error Mitigation Controller - How many essential bits are in my design?

Debugging Questions
(Xilinx Answer 39787) - Soft Error Mitigation Controller - The core does not transition out of the initialization state

Other
(Xilinx Answer 41955) - Soft Error Mitigation Controller - How is the IP affected by the Spartan-6 9K block RAM issue?

Release Notes
(Xilinx Answer 42519) - Soft Error Mitigation Controller v2.1 - Release Notes and Known Issues
(Xilinx Answer 40444) - Soft Error Mitigation Controller v1.3 - Release Notes and Known Issues
(Xilinx Answer 39372) - Soft Error Mitigation Controller v1.2 - Release Notes and Known Issues
(Xilinx Answer 37934) - Soft Error Mitigation Controller v1.1 - Release Notes and Known Issues

Known Issues
Note: These answers are listed specifically in the release notes answer records as known issues for that release.

General Known Issues
(Xilinx Answer 40448) - Soft Error Mitigation Controller - Propagation of X's might occur during timing simulation
(Xilinx Answer 40991) - Soft Error Mitigation Controller - Correction by Replace not supported with EasyPath Devices
(Xilinx Answer 39350) - Soft Error Mitigation Controller - Timing Simulation Error "Warning: /X_FF RECOVERY Low VIOLATION ON RST WITH RESPECT TO CLK..."

Version Specific Known Issues
(Xilinx Answer 43106) - Soft Error Mitigation Controller v2.1 - External Shim interfacing with SPI device issues the "enable 32-bit addressing" multiple times at startup
(Xilinx Answer 42482) - Soft Error Mitigation Controller v2.1 - Hold time violations in par and trce when targeting Virtex-6 LX760 -1L
(Xilinx Answer 42494) - Soft Error Mitigation Controller v2.1 - Correction by Replace and Classification features are not supported in Spartan-6
(Xilinx Answer 42483) - Soft Error Mitigation Controller v2.1 Component switching limit errors when targeting Spartan-6 devices
(Xilinx Answer 37935) - Soft Error Mitigation Controller v1.2 - After meeting timing, PAR reports hold violation upon running another routing phase
(Xilinx Answer 38130) - Soft Error Mitigation Controller v1.1 - Virtex-6 -1L Speed Grade ICAP Frequency Limited to 60 MHz
(Xilinx Answer 39518) - Soft Error Mitigation Controller v1.1 - Does the core support an encrypted bitstream?

Revision History

06/17/2013 - Revised content for 2013.2 release

07/13/2011 - Added 43106
07/06/2011 - Added v2.1 Release Notes and Known Issues
05/09/2011 - Initial release

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
54642 Soft Error Mitigation IP Core - Release Notes and Known Issues for Vivado 2013.1 and newer tool versions N/A N/A

Child Answer Records

AR# 42103
Date Created 05/09/2011
Last Updated 06/20/2013
Status Active
Type General Article
IP
  • Soft Error Mitigation