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AR# 42251

UG534 - Pinout for Main IIC Bus connecting to NV Memory

Description

UG534 (v1.5), ML605 Hardware User Guide, lists the IIC Memory Connections in Table 1-18, page 44.  This shows the SDA pin as N10 and the SCL pin as P11.  This is inconsistent with the schematic.  Which one is correct?

Solution

The schematic has the correct IIC Memory Connections pinout and should be followed.

SCL pin is AK9
SDA pin is AE9

Table 1-18 has been updated in UG534 (v1.6) and now shows the correct IIC Memory Connections.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
34836 Virtex-6 FPGA ML605 Evaluation Kit - Known Issues and Release Notes Master Answer Record N/A N/A
AR# 42251
Date Created 06/02/2011
Last Updated 09/17/2013
Status Active
Type General Article
Boards & Kits
  • Virtex-6 FPGA ML605 Evaluation Kit