In 13.1 ChipScope Analyzer, the Line Rate field in the IBERT core does not display the correct line rate that was set up with the core.
Is the GT set up correctly, or is the field showing the incorrect line rate?
This is a known issue in 13.1 and 13.2. Analyzer is not displaying the correct line rate. This should be fixed in 13.3.
You can verify that your GT is set to the correct line rate by checking the settings of the PLL in the DRP settings tab.As long as the settings of the PLL match the expected settings for your line rate, the GT is operating at the correct line rate.
If you are unsure of what the proper settings are for the PLL in your GT, you can find this in the appropriate section of the GT user guide.