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AR# 42446

Chipscope IBERT - Problems in Analyzer when trying to use multiple FPGAs with IBERT loaded


The following answer record details a known issue with ChipScope Analyzer in ISE 13.2 software when using a board with multiple FPGAs that have an IBERT design loaded on each FPGA. This answer record applies to Virtex-6 GTX or Virtex-6 GTH FPGAs only.


ChipScope Analyzer has a known issue when using a board with multiple FPGAs in the JTAG chain. Below is a description of the issue.

- Open up ChipScope Analyzer and connect to the JTAG Chain
- Configure the first FPGA with the IBERT core. This core will work just fine
- If you configure the second FPGA with an IBERT core, you will get the following message:
Project settings do not match current core! Do you want to set up the IBERT V6GTX core with settings from the current project? (A similar message is given for GTH projects)
-If you click yes, the second FPGA IBERT core will not show up on the left hand side and you will not be able to use the core in the second FPGA

To workaround this issue, you can use one of the following workarounds:
1) Click No on the dialog box that comes up earlier and you will be able to use both IBERT cores with no issues
2) Reload the original project and both IBERT cores should appear
3) If you already clicked on YES on the dialog box, you can reconfigure the second FPGA and clickNO when the dialog box re-appears
For any channels that are not linking automatically, just reset the channel manually and they all should come up.

This is a known issue in ChipScope Analyzer 13.2 and will be fixed in ChipScope Analyzer 13.3
AR# 42446
Date 05/19/2012
Status Active
Type Known Issues
  • Virtex-6 HXT
  • ChipScope Pro - 13.1
  • ChipScope Pro IBERT for Virtex-6 GTH
  • ChipScope Pro IBERT for Virtex-6 GTX