AR# 42710


13.1 Planahead - Running Synthesis in Tcl with the -copy_sources Does Not Copy Included Files Causing Synthesis to Fail


WhenI run synthesis with the-copy_sources,XST fails, stating that itcannot find the included files (that are not sources in the project).

What should I do to fix this issue?


The -copy_sources option does notcopy files that are not explicitly added to the project, therefore, the included files are not copied to the run directory.

XST always searches the current working directory (CWD) last for included files, but, because the CWD is changed to the run directory,it cannot find the included files that are only found in the original location.

To work around this issue, add the included files to the project (so the include files will be copied to the run directory)or specify the absolute path to the include file in the Verilog source file where the include statement is made (so that the include files can be found from any directory).

In the 13.2 PlanAhead tool, the -copy_sources option has been enhanced to parse Verilog sources and copy include files with the other sources.

AR# 42710
Date 05/19/2012
Status Archive
Type Known Issues
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