To enable the internal differential termination for the system clock used by the IBERT core:
1. Uncheck the "generate bitstream" option in the Virtex-6 GTX IBERT wizard. This generates the IBERT core without running an implementation.
2. In the example_design directory, go to: <coregen project>\<ibert core name>\ directory.
3.Open the "example_chipscope_ibert"HDL file and find the following string: "U_SYSCLOCK_IBUFDS."
4. Add the DIFF_TERM attribute setting and set this to TRUE. For IBUFDS instantiation syntax help, see the Virtex-6 Libraries Guide for HDL Designs.
5. Navigate to the "Implementation" directory of the IBERT core.
6. Run the implement.sh (for linux) or implement.bat (for windows) to implement the design.