When I run my MIG simulation, I see an error reported for an illegal clock period. I changed the frequency of the sys_clk, but I ensured that the rest of the PLL settings were changed properly. Did I miss something? It seems like the simulation works as calibration completes.
"sim_tb_top.u_mem_c3 : at time 49952.502 ns ERROR : Illegal clk period for CAS Latency 3
sim_tb_top.u_mem_c3 : at time 49952.502 ns CLK PERIOD= 4.998 ns
WARNING: at 49967502 ps: Timing violation in /sim_tb_top/u_mem_c3/$period( Clk:49962504 ps, :49967502 ps, 5 ns)"