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AR# 43060

Kintex-7 - BitGen Patch for Kintex-7 325T Initial Engineering Sample (ES) Devices


This patch is required for bitstream creation in ISE Design Suite 13.3 and 13.4 software for the Kintex-7 325T Initial ES devices (XC7K325T CES9937).


This patch is required for the Kintex-7 325T Initial ES devices only (XC7K325T CES9937). This patch fixes/corrects a small number of memory cell settings for the XC7K325T.The patch replaces the kintex7.bfd file in the ISE Design Suiteinstallation. It is recommended to update to ISE 13.4 software, but the ISE 13.3 patch is being provided as well.

The tactical patch for ISE 13.4 is located here:

The tactical patch for ISE 13.3 is located here:

Kintex-7 325T Initial ES devices are not supported in the 14.x release of ISE Design Suite. Design targetting these device must use 13.3/4 with the patches linked here.

Important Note:Use this patch only withKintex-7 325T Initial ES Samples (XC7K325T CES9937).This patch will affect all Kintex-7 devices being targeted; therefore, do not install this patch to an ISE software installation that will targetGeneral ES or ProductionKintex-7 devices. Separate ISE installs are recommended for Initial ES and General ES silicon because of this patch. The MYXILINX variable can also be used, as described in (Xilinx Answer 2493). This patch will not affect Virtex-7 or Artix-7 FPGAs.

Install the patch by extracting the contents of the ".zip" archive to the root directory of the XILINX 13.3 ISE softwareinstallation, for example, C:\Xilinx\13.3\ISE_DS\ISE\), or your MYXILINX environment variable. Select the option that allows the extractor to overwrite all of the existing files and maintain the directory structure predefined in the archive.

For more information on finding the Xilinx installation and using environment variables, see (Xilinx Answer 11630).
For more information on using the MYXILINX environment variable, see (Xilinx Answer 2493).

Note: You might be required to have a system administrator to install the patch if you do not have write permissions to the Xilinx Install directory, or can not use the MYXILINX option.

Please contact Xilinx Technical Support with problems or questions.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
43347 Kintex-7 FPGA Initial Engineering Sample (ES) - Known Issues Master Answer Record N/A N/A

Associated Answer Records

AR# 43060
Date 11/01/2012
Status Active
Type General Article
  • Kintex-7
  • ISE Design Suite - 13.3
  • ISE Design Suite - 13.4
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