This section of the MIG Design Assistant focuses on the SimulationDebug Signals description for the Spartan-6 MCBdesigns.
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The UNISIM model of the MCB primitive within the top-level MIG wrapper is encrypted, preventing access to internal nodes. However, some additional signals that might be useful in simulation debug have been made accessible by bringing them to the top level of the UNISIM model. These signals can only be viewed in simulation; they are not accessible in hardware. The signals are located in the hierarchy path */memc*_mcb_raw_wrapper_inst/samc_0/B_MCB_INST.
Clock Debug Signals
The clock frequency should be thesame as the memory frequency.
Controller Debug Signals
These signals show calibration processes and commandexecution.Ctrl_state shows the controller FSM states, which can help to locate initialization errors.
Calibration Debug Signals
These signals show calibration logic processes.Cal_state can show which state is in an error state and helps to locate the calibration error.
Arbiter and Data Capture Debug Signals
These signals show arbiter status and read data status.These signals can help to locate port commands execution order and read data error problems.
For more information on thestate machine description, please see theSpartan-6 FPGA Memory Interface Solutions User Guide(UG416):