Description

Solution

This is incorrect behavior as internal VREF should be applied to all banks that require VREF. To work around the problem, add the INTERNAL_VREF constraint into the generated UCF for the missing banks.

Example 1: INTERNAL_VREF for Bank 14 using HSTL_II (1.5V), which requires a 0.75V reference voltage, uses the following constraint:

CONFIG INTERNAL_VREF_BANK14 = 0.75;

This is scheduled to be fixed in the 13.3 release.

For Internal/External VREF Guidelines, see (Xilinx Answer 42036).

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